Senior Design Verification Engineer (remote position)

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Correct Designs is seeking talented Verification Engineers with SystemVerilog UVM experience to work with major clients nationwide, including projects in AI, Machine Learning, SOC/ASIC products, aerospace FPGAs, medical electronics, RISC-V, ARM peripherals, and DSPs. These roles support verification of advanced CPU/GPU SOCs.

We offer long-term contracts, typically lasting around 3 years, with the possibility of shorter or longer terms. Our engineers enjoy respected positions, competitive hourly rates, health care, and retirement benefits. Contracts can be paused between projects, providing flexibility, or continued seamlessly for stability.

Based in Austin, TX, with clients across the US, opportunities include both in-person and remote work.

Responsibilities

1. Verify complex design blocks using SV/UVM environments
2. Develop and execute pre-silicon verification plans
3. Create directed and random verification tests
4. Develop verification components and tools
5. Implement verification functional coverage and analyze coverage results
6. Debug regression failures
7. Replicate and review functional issues for bug fixes

Required Skills and Experience

1. 8+ years of verification experience in hardware development
2. Proficiency in SystemVerilog and UVM methodologies
3. Strong debugging skills with tools like DVE/Verdi
4. Object-Oriented programming, computer architecture, and data structures knowledge
5. Analytical, problem-solving skills with attention to detail
6. Excellent interpersonal and communication skills
7. Comfortable working across geographies

Desired Skills

1. Experience in verification environment architecture and scripting (Perl, Ruby, Make)
2. Knowledge of formal verification, RTL design, or software development

Education

Bachelor's or Master's in Electrical Engineering, Computer Engineering, or Computer Science

Additional Details

• Seniority Level: Mid-Senior
• Employment Type: Full-time
• Industry: Semiconductors